Something along these lines i suppose.
In this simulation, the top 1K and 10K resistors going to 5V is what is in the pet - the reset line is pulled high via a 1K resistor and the PIA chip has an internal pullup. I guessed it as 10K but it might be a different value.
The 10K bleeder resistor and 500nF cap values are placeholders. They need to be dimensioned according to the internal pullup of the via and the timing needed.
A bigger bleeder and/or a bigger cap and the time you have to press the reset goes up, but a bigger cap also means after a reset the diag line gets pulled down by the charging cap.
Heres the file for https://www.falstad.com/circuit/circuitjs.html if you wanna play with the values
Yea, the reset line itself is pulled to 5v through the 1k resistor. Same goes for the diag line but the resistor in integrated into the chip itself, while the 1k is on the pet board.
The main advantage of issuing a reset with diag line low is that the ram does not get cleared.
If you also pull the NMI line during reset, you will not end up in TIM, but with ready on the command line.
This may be preferred in some situations.
So basically a little 3 switch box is the better solution.
