Beiträge von jlopez

    Greetings,

    I have some new things and others that aren't that fresh but also worthy to report.

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    With this I regain the ability to repair hardware!

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    I found one of the rare tax-evading Amstrad computer!

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    I found many interesting things in dump piles near my home, including this ATMega, four breadboards, and some videoconsole boxes.

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    My father brought me some astronaut backpack!

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    Last, but not least, Toshi sent me the original monitor for the P2. This way, my Italian unit is complete. He was generous and never asked a price! So thank you very much.

    Regards,

    Jaume

    Greetings,

    A few months ago I was delighted when I learned the Deutsch word "Hamsterkauf".:hamster:

    It is my turn to expose a word from the country where I was born: "Estraperlo".

    ::money::

    "Estraperlo" comes from the name of an electrical roulette made by two Dutch men called Strauss and Perlowitz. Albeit gambling was forbidden during the Second Spanish Republic, top public officials gave permission to them to operate. This corruption scandal was soon discovered and as most officials in the government were involved (including prominent members as the PM Lerroux and the mayor of Barcelona) prompted the third and last elections of the period, literally destroying the center-right parties and polarizing the country which went into a crude civil war not long after. When the war was over the word was associated with the black market and, after the postwar famine, with anything related to corruption, illegalities, black markets, etc.:capone:

    You may be asking yourself: "Fine, but why is this guy talking about this in an old computers forums?". Well, to be fair, this is the Amstrad forums, I'm talking about Spain and also about something wrong (maybe even illegal) that shouldn't have ever happened. Knowing those facts, you may be already guessing what's going next.8o

    Spoiler anzeigen


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    The responsibles of this lied both to the authorities and to their users because they didn't want to pay some taxes... Spanish picaresque at its finest. It is not clear if it was Amstrad itself who gave the order or was the filial company in Spain who did it. Nevertheless, they never got caught. This is the second model, so "Ñ" key and standard BASIC 1.0 ROM (464)... was the older model it would have British keyboard and BASIC 1.1 (664).

    I imagine that as it can only be found in Spain it may be rare to see this piece of hardware around this forums, so I thought you may be interested in seeing it.;)

    Regards,

    Jaume

    Hello Helmut,

    That's a relief. I told him the failure was most likely caused by the VTAC, but I wasn't completely sure. If that's the cause, the computer may be working very soon.

    I haven't only guided him to find what was preventing the computer to start, but I supplied him my remaining ATX adapter and 48K replacement kits.

    gpospi I was writing this when you replied. Thank you! ;)

    Regards,

    Jaume

    Greetings,

    Last Friday another Spanish unit appeared. With both overCLK 's and mine's this is the third known unit to appear. This one is like mine and different from overCLK 's. As both units were found in Catalonia while overCLK 's was found in another autonomous comunity the conclusion is that the units sold in the Catalan market were different from the ones of the rest of Spain (which have that stylish Triumph-Adler badge).

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    As seen, the case is the standard one for the P2, but with the distributor badge (Guillamet) under the Alphatronic Sticker. My unit doesn't has the badge, apparently it was lost long ago but the glue is still there as a reminder of what once held.

    On the technical side, the computer is also a little different. Up to that point all known P2 units were 64K units (even mine, which is not a "U" model). This one is the unupgraded 48K unit.

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    Now, the tests... the power supply is defective. It was shorting 5v, 12v and ground. All the boards were fine, there was no dead capacitor, even in the 48K DRAM card. With the boards in good shape I considered the computer to be ready for a test so I explained his owner how to wire an ATX into the backplane. After he checked the supply voltages from the backplane we considered it to be secure for the power up so he connected the three boards required for minimal operation: CPU, Keyboard and Video. The system resets correctly when powered on (also beeps as it should) and reacts to commands from keyboard. But the video display seems to be faulty.

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    The monitor is known to be working fine, so the fault is up to the video interface. I think his problem is CSync but I would like to know what do you think the problem would be. VTAC? :grübel:

    Note: this unit is not mine and I haven't even seen it other than i pictures and a couple of videos, the images posted here were uploaded with the consent of his owner. I'll try to convince him to come here. When he rescued it he said there was some possibility he had the Spanish manuals but after a search he found none. Still, the simple fact to appear was enough to give me one of the best days of the year.

    Regards,

    Jaume

    Greetings and sorry for the long wait.

    There were incidents at home that left me without the mood to continue in projects. Recently I have made some progress.

    Sometime ago I found some breadboards in a junk pile. They are tattered, two of them a bit melted and one lacks a row of contacts. Still, I found them to be reliable when used, I later saved some money and bought more of them and wires and have started prototyping as I should have from the beginning. It was expensive for my current budget but I was tired of not having a proper tool set. And so, I resumed development.

    My experiments with sound were halted in february and since then I learned much more. Still, I had preference on digital over analog electronics and as a result the first complex circuits I made with my new tools are digital.

    I compared what I had done whith one of the most common systems with sound (NES) and found my developing to be far behind. And so I challenged myself to get the closest I could. I think that, with the exception of the DCPM channel, I got near.

    I first built the noise generator. It consists of a 17-bit LFSR: Noise Test

    Then I made the pulse wave generator with variable duty cycle: Pulse Test (Failure)

    This circuit was inspired by the Hellschreiber as I was wondering how would its characters sound. Then I realized if the character ROM was replaced by another circuit whose function was creating a single character, I could easily implement the variable duty cycle. The character is exactly this one:

    0 0 0 0 0 0 0 0

    0 0 0 0 0 0 0 1

    0 0 0 0 0 0 1 1

    0 0 0 0 0 1 1 1

    0 0 0 0 1 1 1 1

    0 0 0 1 1 1 1 1

    0 0 1 1 1 1 1 1

    0 1 1 1 1 1 1 1

    Then I resorted to video circuits, especially the one found in early PETs and the SKS KISS. The resulting circuit was designed by stripping them down. Still, it was a failure. Somehow it produced an awful noise when it shouldn't. After debugging it was found the only 74LS166 shift register I had was defective by failing to output high but it worked fine when outputing low. I patched the circuit with a 10k resistor from the 5v supply pin to the output and worked. Still, the circuit was so sensible that every time I approached my hand it started to generate noise: Pulse Test (Fixed)

    Finally, the sawtooth/triangle section. It just needed a synchronous counter, an XOR ic and some logic to control the invert operation. This means that with simple logic I could generate three different tones. And three tones is what I got. Unfortunately, I'm unable to discern an inverted sawtooth from a non-inverted one: Sawtooth-Triangle Test

    On the analog side, I found some operational amplifiers in my father's stocks of components and started to test them. I start to realize they aren't as complex as I thought and, whith some time may even domesticate them just a little.

    Regards,

    Jaume

    I present you PET Spare Keyboard nº2.

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    Note that all the lettering is beige while the symbols at the front of the key are pure white. A bad case of regular yellowing.

    Greetings,

    About two years ago I rescued an old AIM/65 with its original documents and many papers. Recently I took a look at those papers and found some interesting information. Comelta not only imported and distributed the AIM/65 in Spain: over time their "expansions" for it became part of a stand-alone computer mounted in a backplane. Prior to the release of "Drac-1" ("Dragon-1" in Catalan), they called it CR-System and apparently its boards were sold apart. While some of the boards are known, I found more board references which can help in making a more comprehensive list. I also found some prices and a release date for some of the boards. My backplane pinout document is slightly different from the only other source I found (mine has a battery supply line). Additionally it is also headlined with "Development Laboratory".

    Unfortunately, there are no schematics but simple descriptions for many of the boards. I uploaded the scans here.

    Regards,

    Jaume

    Greetings,

    I think this time I got it. Some footprints may need to be replaced. I would like to know what do you think about this revision.

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    The full schematics for the board:

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    Thank you very much,

    Jaume

    I have just retraced and corrected it. Thank you.

    As said, I was wrong.;)

    Greetings!

    I have revised the whole thing.

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    The outputs of UE6B and C are connected to parallel (to get more driving capacity). Are they connected to the RAMs pin #10 (write enable)?

    Do you remember that part of "I hope I got it wrong"? The write pin signal is wired to UE1#4. The outputs of those not gates doesn't seem to be connected anywhere... I can't understand why. Unless I got it wrong even after multiple revisions (like that thing with the numbers ;)).

    Both 8226 units have been added and the remaining components to add are UD1 (74LS04, not), the memories (that will be a fast copy-paste job), the connector and the capacitors.

    I just found an error with the switch's pinout and it is to be changed.

    helwie44 † wanted a diagram with the positions of the components, which is an understandable request. I have bad calligraphy and I'm not that good with image manipulation so I resorted to Kicad's own PBC design utility to generate it. Only two drawbacks: it only shows components present in the document and the grid needs to be adjusted. The first is to be solved when the rest of the parts are documented and the latter is not needed at this stage.

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    I hope this is useful and if revised and found correct the document could be finished this same afternoon.

    Regards,

    Jaume

    Hello,

    I'll revise for the next update tomorrow. Yes, this matches the original numbering. Being focused at both edges of the board and especially on the component side I missed completely numbers 2-5. Didn't saw 1 and while I saw 6 I thought it was some defect because seemed some sort of via but present only at one side... Thinking there was no numbering I used the same decreasing pattern I saw in the video card, albeit with numbers instead of letters.

    You are right, I revised pins 9 and 10 of UE1 and they were connected when they hadn't to. I suppose this error was made while moving the gate. All references are updated and the remaining issues you reported are to be checked tomorrow before updating again.

    Regards,

    Jaume

    jlopez : Nice work!

    What is your intention here? Just to understand and to reverse engineer the circuit or do you plan to create new PCBs ?

    Regards

    Stephan

    My goals are to understand the circuit, generate schematics and obtain any information that could speed up diagnostics and repairs. Maybe it's late for you this time, but maybe next time someone (including yourself) comes around with a KISS with faulty memory this process may save his/her time and reduce the risk of damaging the boards during the process.::solder::

    About recreation, I don't use to center new designs around components whose life cycle has ended. I make some exceptions, but the 2114 is not in my plans. Still, if some KISS came incomplete, this would also help if its owner wanted to recreate a board looking similar to the original unit. Talking of memory boards... have you been able to test the prototypes on the KISS?

    Regards,

    Jaume

    Sorry for the confusion. I found the original and will stick to it.

    A word to the reference numbers on the PCB: did you see that some copper letters are on the front side of the PCB: B D F G ?

    jes - i have the 16kB s-ramcards (sks , manufactory date 29.01.1980).

    These partial designations on the component part are only available as auxiliary information - so that there is better space for the conductor tracks.

    The full designation of A B C D E F G is available on the back.

    A word to the reference numbers on the PCB: did you see that some copper letters are on the front side of the PCB: B D F G ?

    Hello!

    I did not miss those letters! But what I have missed completely is the numeration... :wand: Yes, it is present and albeit being present and just in front of me I wasn't aware of it. And got it wrong!:D Now I must change all references in my schematics...

    Following points are suspect to me (I did not cross check with the PCB, because I am on holyday and my possibilities are very limited):

    UE6C pin #9 and #10 are connected in your diagram. Please check again.

    Plausibly for me would be a connection from UE6B/#6 with UE6C/#9 only!

    UE6C/#8 will deliver the signal to control the buffers 8226.

    The outputs of UE6B and C are connected to parallel (to get more driving capacity). Are they connected to the RAMs pin #10 (write enable)?

    I'll check them after renumbering... But the single connection between two '04 and the '00 surprisingly are as stated, the not gates at B also provide the negation coming from the '86 xor.

    Regards,

    Jaume

    Hello helwie44 †

    Yes, I thought the floppy controller unit file would have also the position diagram... but no. U + Alphabetical character + Number + Gate (if required) is a notation found in the schematics for PETs. I don't know if the DS schematics would be helpful in this case... every single manufacturer used its own reference system (TA used just numbers for the P3's ICs). Still, I would be interested in having a look on them, if possible.

    If the reference methodology is not understandable or clear and is found to be confusing, we could always revert to the standard notation. I tried to resurrect the old one just for historical purposes.

    Thank you very much,

    Jaume

    The logic is done. The remaining not gates are there to negate addresses. I hope I got it wrong and those gtes at the read and write signals aren't like I think they are. =O

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    I have many obsolete components in my custom libraries. The 2114 memories are present but thee 8226 are missing and I have to create them.

    Regards,

    Jaume

    CAD, first part:

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    This corresponds to logic at the edge of the board, opposite side from the connector. Enable pin number 6 at the decoders is connected to the rest of the logic located near the connector. Not gate (pins 8 and 9) is unused. This part is coming after lunch.

    Notation is weird if the letters are to be considered... First because in the case of gates another letter is appended. Second, "U" must be prefixed, as in CBM documentation because ICs at row "C" would have a reference conflicting with the capacitors.

    I imagine there is a lot of room for improvement. If you see anything wrong, or you have any idea that could improve it don't hesitate to say it. ;)

    Regards,

    Jaume

    I'm in the process of changing my temporal notation with one that simulates SKS numbering. The good thing is that I found a SKS document that contains both schematics and a page describing the placement of the components.

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    Tha bad thing is that both cards have the lettering in different axis... the video board has them placed at the horizontal while the memory at the vertical axis. Still, I think the most reasonable notation could be numbering the columns 1-7 from the edge to the connector. What do you think?

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    Edit: the first diagram comes from the schematics maintained by helwie44 † and any picture from the KISS' board from Toshi

    Regards,

    Jaume

    Hi Jaume,

    It's very interesting for me to follow your working!

    The enable inputs of the two LS138 (pin #4) are connected to the LS04 pin #10 and 12, so that one LS138 is enabled, when the other is disabled and vice versa. The pin #13 of LS04 (input) is connected to the MC80-connector pin #22, so the select signal for the RAM is coming from the back plane!

    Have a nice day!

    Peter

    Good morning!

    Pin 22A is an address. ;)

    Thank you very much for checking. A single person working in it is easier to get it wrong.

    Regards,

    Jaume

    By now I have a partial schematics for the decode logic. I'm a bit lost with the not gates... when chained they are not not not not not not not not that difficult to follow.:S

    The good thing is that I have found how are the pairs structured and what ICs control them. The pairs are aligned horizontally, with the rightmost ic of each pair containing the higher nibble and the leftmost the lower one. Each 74LS138 controls eight pairs (no surprised at all) with output 7 at the bottom and 0 at top (so, if taking as a reference our lecture order then in a increasing patern). All enable signals, with the exception of pin 4 are shared between them. The select signals are also wired to the same signals (A11, A12, A13) after they are negated (so, positive logic).

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    I still don't know what of both decoders is activated when a specific address range is specified... it's the only necessary part to allow the creation of a precise diagnostics tool for the KISS which is still missing.

    About the schematics, I could have the hand-drawn ones finished for today, and tomorrow start with the cad part.

    Regards,

    Jaume

    No, does not work, not with my hardware.

    Don't worry. ;)

    I found half of the switch is useless. An entire side is connected to ground (inputs) and on the other side (outputs) half the pins are disconnected while the other two are wired to the input of two xor gates, as well as the resistors. They are xored with -A14 and -A15 and then negated (so xnored). Both resistors are tied together and pulling up. I'm with the rest of the '04s of the column now.

    Regards,

    Jaume

    That can be easily done changing the scanning parameters, especially contrast to a high value (maximum or nearly).

    I have checked for your pictures of the board before the disassembly, and found all the references visible. If I start now, I could have it done before the day ends. I'll check also for other SKS documents helwie44 † saved in order to recreate the numbering sequence of the ICs.

    Regards,

    Jaume

    Too late.:sense::sense:I had to kill the 96pin DIN connector because ist was crimped and glued to the board ...

    As you can see, some of the middle row pins are used.

    Of course, middle column is B and it carries control signals like -MemR and -MemW.

    You could try to recover the stickers on the connector using a hairdryer. If you succeed they could be glued on the new part.

    It's not necessary for you to continue with the documentation, if you are busy. If you could provide the ic references and their positions, I could do it while you reassemble the board.

    I didn't want you to remove the connector but as you have done it, I must thank you. I'm trying to remove it from the CPU module and thought it was stuck... if you say it is glued and I have to kill it anyways it would save both time and damage.

    Regards,

    Jaume

    Do you have a good idea of the workflow to document the PCB?

    I have no experience using PCB Layout software (up to now, at least).

    The first step is disassembly, which has been already done. Boards without components (like backplanes) don't need this first step. If there is any patch involving wires has to be annotated before their disassembly. Next, a drawing of the board has to be made and the references of the components annotated in it. The next step is to find the pinouts of the components. You may find them in their datasheet, for the connector you may find its pinout at helwie44 † 's website. I imagine in this case column C would not be used, if that's the case then there's less work to do. Once the pinouts are known, the layout may be recorded using the most advanced technology available: paper and pencil. Lot of work can be avoided with the memories: they are likely to have shared data and address bus... but being 2114 there are two 4 bit data busses (the 8 bit one is split in two halves). After this, the logic: who sends and who receives, and that's all. For the generation of schematics, I use Kicad. It's very user-friendly and allow to create new symbols and footprints which is ideal for the long-obsolete 2114 which is not in the libraries. If you use it, I could either provide my custom library or directly creating the schematics from your drawings.

    This information is important, not only during repairs but also for diagnostics. If we knew what ic contains a particular memory cell, it could be discovered by software and by then, the work of having the 96 memory chips desoldered would be history.

    Regards,

    Jaume

    I checked Mouser and the capacitors you need seem to be in production.

    I know that's uncalled but... I don't remember having seen the schematics for this module. Now that your board is mostly unpopulated it could be a good time to document its logic.

    About soldering them again, my advice is to solder sockets in their place. It wouldn't look as pretty as before but service and check would be easier and faster.

    Regards,

    Jaume

    Greetings,

    I should have checked for this before creating my own thread... If you think it is necessary it may be moved into this one.

    The backplane connections are fully documented... what remains to discover is what signal do they carry. The backplane allows for a second video card, it may be worth to check if it is P2 compatible. The positions reported could be added in my backplane document, if you agree.

    My CPU card had a patch consisting in a cut trace and two soldered wires, which yours doesn't has... even sharing the same reference.

    The empty socket may be for a 2K EPROM. The P3 was an upgrade, albeit in some ways it was a cut version of the P2: its MOS was downgraded from 6K to 4K.

    Regards,

    Jaume

    Removing them all was a must, certain components can interfere multimeter readings (low impedance resistors, dead capacitors, etc.). And yes, I was going the scanner way (scanners don't have either lightning or perspective problems). You read my mind. :S

    Just for the record, months ago I had the backplane documented, but I don't remember where did I post it... Those documents may belong to this thread now and for this reason I'm uploading them here too.

    Thank you very much,

    Jaume