CBM PET 2001 Restoration

  • Initially the PET displayed only a horizontal line as if the vertical video synchronization signal was missing. This type of machine (320137) doesn’t have an integrated (CRTC) video controller chip; rather the CRT is fed with TTL signals by a network of discrete logic chips. I programmed an MCU to act as a signal generator and I could confirm that the monitor itself is operational.

    I've removed the mainboard and cleaned it with isopropyl alcohol. Assembly number: 320137 ( *Suspicious patch cables around the RAM chips )

    ( Factory patch cables in the video logic )


    To conduct further diagnostics I am running everything from a laboratory PSU to avoid unwanted voltage fluctuations that frequently lead to more damaged MOS chips. ( Also bypassed the AC part of the monitor ) By looking at the schematic I've identified a faulty logic gate - at position D8 - in the vertical signal generator, and replaced it.


    The original failure was gone, but the computer didn’t go into boot mode, stuck on the initialization screen and the image was running. This is normally not visible during a normal boot up sequence, as the CRT is heating up at the time when all characters are displayed.

    This screen indicates hardware failure on old CBM machines, but doesn’t pinpoint to any particular issue. In order to find the source of the problem a set of diagnostic tools are required that were not available at that time. To cross check some of the MOS chips I’ve restored a CBM VIC20 that has compatible CPU and CIA chips.


    I have found the CPU in good working order, but one of the CIA chips was faulty. The peripheral controllers are not necessary for the PET to boot up, so I thought there must be more damaged circuitry. While a functioning VIC-20 was on the table I removed the Datasette from the PET. There were three identical drives from which I was able to salvage two by using one as a donor. ( I'll fix the third one as well at some point. )

    To narrow down what the cause of non-boot state could be I’ve removed every single 2114 RAM chip from the mainboard. This type of RAM chip is also found in VIC-20 or as color RAM in earlier C64 models, but I’ve decided to build a static RAM tester as it could be a useful diagnostic tool for the future. The memory chip itself is a 4 x 1024 bit static RAM with 8 address and 4 data lines. The PET has 16 of these, and are connected in pairs to the 8 bit wide data bus, summing as 8Kb of total system memory. The tester first writes an incremental pattern of nibbles to 10 random addresses and reads them back for comparison. Then it iterates over all addresses with all possible data combinations, comparing the written data with the read ones one at a time.

    With this tool I was able to find two damaged RAM chips on positions J7 and I4. System memory is accessed top down, and only the first 2Kb is required for a successful boot routine to run. So J7 was certainly blocking the process.

    During desoldering I’ve found the reason behind the suspicious patch cables around the RAM chips: someone has already replaced I5, I6 and J8 some time ago and wasn’t careful enough and cut some of the traces. So I have put precision DIP sockets to the affected area and made new patches on the backside of the board. With a multimeter I have double checked all the other RAM traces as well and they seemed to be good. I’ve put back 4 good RAM chips to the upper 2Kb area and tried to boot the PET, but still without success. Since the minimum chip population is the TTL glue logic, some RAM, the CPU and the ROM chips I’ve turned to testing the ROMs. These ROMs are 2316 type 16Kb chips that need an adapter for modern EPROM programmers to be read out. Before building an adapter I thought I could rule out some of the ROMs by replacing the character generator ROM with the remaining 7 system ROMs one by one, as the glue logic would display their contents on the screen.

    With this method, most of them seemed to be working, except two that gave black screen. As this test is inconclusive it was time to read out their contents. I read them with my TL866 and compared the ROM contents with the factory default binaries. ( H9 was a revised v.2 BASIC )

    This has left us with only 3 working original ROM chips. It was time to order replacements. As the 2716 type EPROM has the same capacity and has a drop in compatible pinout it seemed a reasonable choice over more modern solutions that would require an addon card to interface with the computer. Also these chips were available at the time the PET was still on the market.

  • When the 2716s arrived, I needed to complement the TL866 with an adapter that is able to handle the higher programming voltage these chips require. I’ve programmed all 7 system ROMs and placed them in the machine, but the PET is still stuck.


    Looking again at the schematics I’ve decided to fix the running image problem as it might shed light to other issues in the glue logic. I have started to trace down the vertical synchronization signal with an oscilloscope and tested every single TTL chip on the way with the TL866. I have found and replaced 3 bad chips, none of which had any effect on the running screen.


    I’ve identified a partially failing binary counter (74LS177) at position D7 that could be the root cause of the running image and also has an effect on D4, a quad multiplexer that is addressing C3 and C4 RAM chips. As this integrated circuit is really hard to come by I was considering replacing it with a programmable logic chip, but fortunately I have found brand new old stock SN54177 ICs and ordered them.

    After replacing the 74LS177 the image is still running. The signals on it’s input from E6 are below TTL high level ( ~1V ). Removing E8 and D7 to unload the outputs of E6 doesn’t change the signal levels. Tried to pull up the output lines of E6 with 470 ohm resistors in case the totem poles have weakened, but without effect. After removing the SN74100 (E6) I can confirm that this IC is faulty as well.


    So far the ICs marked with blue stickers and the ones that are in sockets are tested as good:









  • Building a RAM tester for a PET with working video logic (garbage screen) is not necessary.

    The RAM ICs can be easily tested in the video memory sockets.

    Working RAM ICs give a stable garbage screen, defective ones may show changing characters or a non garbage pattern.

  • Thanks!


    every second of the original 2316 has a high active cs signal (this is mask programmed in the 2316), but your 2716 have always low active cs.

    :fp: I completely forgot about pin-20 chip selects...

    What would the most reasonable thing to do? Single transistor inverter for the upper ROM CS lines? Or is there a better solution?

    Working RAM ICs give a stable garbage screen, defective ones may show changing characters or a non garbage pattern.

    In my case the garbage screen was stable despite faulty RAM chips. ¯\_(ツ)_/¯

  • Hi, every second of the original 2316 has a high active cs signal (this is mask programmed in the 2316), but your 2716 have always low active cs.

    Kannst du das mal technisch belegen? Schaltplan?

    Ich haben immer die 2316 im PET gegen 2716 ersetzt.


    EDIT: Ah, ich sehe gerade. CS2 wird benutzt. Ich muss mir das gerade nochmal anschauen, warum das funktioniert hat.


    Das ist lange her. Also laut Schaltplan ist der CS immer low-aktiv, auch auf dem PET-Board. Der CS2 wird von BA11 gesteuert. Der ist beim 2316 high-aktiv, beim 2716 müßte er low-aktiv sein (/OE).


    War das so, dass die 2716er in anderer Reihenfolge drauf gesteckt werden musste? Also C000 und C800 getauscht, D000 und D800 getauscht? Aber bei E000 würde das nicht funktionieren. Wie gesagt, ich weiss es nicht mehr. Ich schaue gerade mal nach, ich meine ich hätte hier einen PET mit 2716ern drin.

  • Ok, habe gerade nachgeschaut. Da sind jetzt 2516er drin, aber die sind pinkompatibel zum 2716.

    Entscheidend ist, dass die an genau den gleichen Positionen sitzen, wie im Schaltplan vermerkt.

    Schlussfolgerung: Der CS2 der 2316er im PET muss ebenfalls low-aktiv sein, genau wie der OE des 2716.

    Im Schaltplan ist der fälschlicherweise als high-aktiv eingezeichnet.

    Oder gibt es eine andere Erklärung, warum das in meinem PET funktioniert?


    nilseuropa Your 2716 eproms should work as expected. You do not need an inverter. :thumbup:



  • Wie sollte das sonst gehen ;)

    Die unteren 2316 (also x000-x7ff) kann man durch 2716 oder 2516 ersetzen, die anderen nicht ohne Adapter mit Inverter.

    Denkfehler deinerseites. ;)


    Bei x0xx ist BA11 = 0, bei x8xx ist BA11 = 1. BA11 aktiviert also immer nur eines der beiden Eproms, die gemeinsam durch die CS-Leitung selektiert wurden.


    Wie sollte mein PET sonst funktioniert.

  • Ja, genau das hab ich doch geschrieben. Im H4 2316 ist CS2 low aktiv.

    Im H7 ist cs2 high aktiv, damit es bei BA11=1 aktiviert wird.


    H4 und H7 hängen doch mit CS1 und CS2 genau an den gleichen Signalen - die müssten doch immer gleichzeitig aktiviert sein, wenn es identische Bausteine wären.


    Wenn du an deinem Board unten nichts modifiziert hast, sind H4 und H7 immer gleichzeitig in Segment F aktiv!

  • Hier hat Andre das erklärt: http://www.6502.org/users/andre/petindex/boards.html



    This board actually came in two flavours, one with the Commodore-specific ROM chips of the 6540 type (#1a), and one with the standard 2316 2k ROMs (#1b). When you look at the #1b schematics you may notice that some pairs of ROM sockets have exactly the same wiring. Simply speaking, using "normal" ROMs one would expect both sockets to react at the same time. And also A11 is connected to the sockets, but should not be needed for a 2k ROM. But the used 2316 have a chip select line at the place where the 2332 have the A11, and this line is programmable! So for one of the ROMs in such a pair the select line is low-active, selecting the lower half of the 4k, the other one gets it high-active for the upper part of the 4k. So you can even swap the two ROMs of such a pair. And when upgrading one can simply plug a 4k ROM in one of the sockets and leave the other one empty!


    PS: Deine Eroms sind ja eh vermutlich leer ohne zugeklebte Fenster ;)

  • So... ::ghost::

    On 2316 datasheet all chip selects are marked as either active high or active low.

    "Designed to replace two 2708 8K EPROMS, the 2316 can eliminate the need to redesign

    printed circuit boards for volume mask programmed ROMS after prototyping with EPROMS."


    2716 is indeed active low CS

    Deselect Mode: The 2716 is deselected by making (Pin-20) G = HIGH

    This mode is independent of EP and the condition of the addresses. The outputs are Hi-Z when G = HIGH.


    F selects H7 and H4, it is logical, that they shall pairwise react to BA11 so one of them should be active high the other active low.

    ( Also the marking on the schematic makes no sense in this case )

    On 2716 EP is Pin-18 ( that's CS2 on 2316 ) = BA11

    and "2716 read operation requires that G = LOW , EP = LOW and that addresses A0-A10 have been stabilized."


    So whenever BA11 is high the 2716 would go into programming mode if the VPP was high enough. ( That's fixed to the +5V rail Pin-21 )

    Otherwise?


    (( Programming sequence (Pin-20) G = HIGH and (Pin-18) EP = LOW ))


    :fp:

  • I think I remeber that it was possible to only use every second ROM Socket with a 2532 EPROM, holding the contents of two original ROMs (x000-x7FF + x800-xFFF => x000-xFFF), because CS2 was wired to the corresponding address line.

    Of course except Exxx, where a 2516/2716 should do the job.


    This way there should be no hassle with high active CS lines.

  • I think I remeber that it was possible to only use every second ROM Socket with a 2532 EPROM, holding the contents of two original ROMs (x000-x7FF + x800-xFFF => x000-xFFF), because CS2 was wired to the corresponding address line.

    Of course except Exxx, where a 2516/2716 should do the job.


    This way there suold be no hassle with high active CS lines.

    I like this plan a lot. I need to get some 2732s...

  • I think I remeber that it was possible to only use every second ROM Socket with a 2532 EPROM, holding the contents of two original ROMs (x000-x7FF + x800-xFFF => x000-xFFF), because CS2 was wired to the corresponding address line.

    Of course except Exxx, where a 2516/2716 should do the job.


    This way there suold be no hassle with high active CS lines.

    I like this plan a lot. I need to get some 2732s...

    You should got for 2532s, 2732 don't fit without Adapter.

  • Stimmt. Danke!

  • Thank you very much everyone. This discussion is most valuable.


    In order to reanimate this PET there are still numerous issues to be solved:

    • Kernal ROMs
    • Missing 6522 VIA
    • Missing two 6520 PIAs
    • Glue logic still has some issues ( SN74100 ) -- probably more then I expect
      • Running screen
    • Some more 2114 ( this should be easy )
  • Ok, hier ist die Auflösung. Ich habe gerade auf der Unterseite des Boards nach versteckten Invertern gesucht - und keine gefunden.

    Aber das Board wurde modifiziert. Allerdings nicht von mir und mir ist das auch nie aufgefallen oder ich kann mich nicht mehr daran erinnern.


    Auf der Unterseite reicht ein Draht:

    (war sogar mit schwarzem Stift dokumentiert)


    Und auf der Oberseite ein einziger unscheinbarer Cut:



    Und ich hatte doch recht. Kein (zusätzlicher) Inverter. :D


    Sorry für die Verwirrung. :tüdeldü: