Posts by jlopez

    Antikythera


    Yesterday night, after some search I found only the documents for the original 6845-based AIM video card, but not this one in particular. Have you found them?

    I would like to ask you if I could reuse your pictures to get an idea of how this board behaves.


    Regards

    I have the original docs for the AIM. While I'm not willing to sell them (because then I'd have mine without docs) if you need any of them I could provide scans.

    You've got a nice piece here, I'll follow closely as my unit came with no extensions and learning about them is important to me. Note that is strange that is wasn't upgraded using the bus expansion slot, but the CPU socket. Just like PETs were meant to be upgraded.


    Good luck!

    :thumbup:

    Thank you for answering!


    The fate for most computers of that era is already sealed. With custom chipsets they will not last long. Other systems will last for a very long time, such as the Commodore PET (pre-CRTC), Apple II or the ZX-80, which are made of generic, off-the-shelf materials which, in case of the most specific ICs can be replaced with small mods. However, we have a case of a computer which has avoided its demise by getting rid of its ASIC. The ZX Spectrum case should be studied. They replaced the ageing ULA with (mostly) 74 series ICs. This means that, as long as the 74 series (with TTL levels), the Z80, its ROM and its RAM are made, Spectrums will be able to be made and repaired (although those with original board will eventually fail nevertheless).


    I think if the Harlequin philosophy could be applied to this system, we would be able to keep them running for some more time (and also to introduce new units). The truth is that I'm not a fan of FPGA or CPLD. They obscure hardware implementation and make it less repairable in case of failure. Also, they doesn't feel retro enough. ;)


    Regards.

    Hello!


    gpospi , I know you have tried the working cpu in the failing board (with no result), but have you tried the "faulty" 8085 in your original board? If it works, then the suspect would be some other component rather than the CPU, such as the oscillator.

    Ich bin wieder vorsichtig optimistisch: Habe mir das CPU Board angesehen, das gestern im Zuge der Kondensator-Explosion auf dem Video Board beschädigt wurde (und seither die Kurzschluß-Notabschaltung des Netzteils auslöst). Der Schaden dürfte sich zum Glück in Grenzen halten. Das Board selbst scheint komplett ok zu sein, alle Leiterbahnen und Kondensatoren sind ok. Allerdings hat sich offenbar die CPU verabschiedet und verursacht nun einen Kurzschluss 5 Volt / Masse. Bei entfernter CPU läuft das Netzteil problemlos an.


    Ich hab mir also eine Ersatz-CPU bestellt, sobald diese eintrifft werde ich die Tests wieder aufnehmen. Mein Plan ist, dieses CPU Board dann testweise in meine P2 einzubauen. Vielleicht sind mit diesem Board (ohne Modifikation für externen Takt) und den darauf befindlichen ROMs dann die Floppy-Probleme endlich beseitigt. Viele weitere Möglichkeiten sehe ich eigentlich nicht mehr...

    You already have another 8085 8)

    So ich habe mal wieder ein Update, die Zusammenfassung lautet "viel erlebt, aber wenig erreicht". Im Detail:

    • Die Teile von Robert ( rfka01 ) wurden heute geliefert. Am Wochenende hatte ich mir schon ein altes PC Netzteil für einen Versuchsaufbau vorbereitet, sicherheitshalber hängt auch eine Festplatte daran um etwas Last zu erzeugen.
    • Im ersten Schritt habe ich die Karten auf Kurzschlüsse in der Stromversorgung überprüft, konnte aber zum Glück keine Probleme feststellen.
    • Voller Erwartung habe ich nun also PC Netzteil, Backplane, CPU Karte, Display Karte und Tastatur Interface zusammen gesteckt. Das sollte ja für einen System-Start bis zur MOS Einschaltmeldung reichen. Beim Einschalten der Stromversorgung beginnt die Reset-LED auf der Tastatur ordnungsgemäß zu leuchten, die Freude ist groß.
    • Leider kommt kein Bild am Monitor und nach einigen Sekunden verabschiedet sich das Display-Board mit Knall und Feuer. Also entferne ich die Display Karte und überprüfe den Schaden. Hier ist ein Kondensator explodiert, der sollte leicht zu ersetzen sein. Offenbar wurde aber auch die CPU Karte in Mitleidenschaft gezogen, jedenfalls verursacht diese nun einen Kurzschluss. Mit diesem Versuchsaufbau komme ich also nicht weiter.
    • Somit baue ich nun die "neue alte Floppy" in meine vorhandene P2 ein um zu sehen, ob damit nun die seltsamen Lese- und Formatierungsfehler verschwinden. Das passiert leider nicht, es treten alle bekannten Fehler unverändert auf.
    • Damit fällt mein Verdacht nun endgültig auf den Floppy-Controller meiner Maschine. Also baue ich den Ersatz-Controller ein und hoffe auf Verbesserung. Leider wird auch diese Hoffnung enttäuscht, die Maschine verhält sich unverändert (Booten von Floppy A geht problemlos, Formatieren mit FOKO scheitert, Zugriffe auf Floppy B erzeugen BDOS Fehler). Auch mit anderen Floppy-Kabeln ändert sich nichts.
    • Ich habe leider kein Oszi um die Signale genauer zu untersuchen. Insofern werde ich mich wohl geschlagen geben und die P2 eben mit einem Laufwerk verwenden. Letztendlich boote ich die Maschine ohnehin nur "zum Spaß" ins CP/M oder BASIC, konkrete "Aufgaben" erledige ich damit ja nicht.

    Other than the blown cap, is there any damage at the video display board?

    "Snipers"... more like "U-boots".

    Silent, invisible. They are hit but don't know from where. It's aggressive but effective, the perfect way to end a bid war. And yes, competitors have no chance, unless they have an automatic bid larger than you, but their victory becomes a pyrric one.


    Once, we found a very rich material source in UK. Someone was selling the content of an entire garage full of Commodore, Sinclair, Amstrad, and other computers, spare parts, printers, floppy units, etc. I got an important part of it at low price with this tactic. Like VIC-1515 for 5€ or a CBM-3032 case and monitor for 20€. We managed to get a Victor-9000 complete with original box too. Our good old days of terror bidding... 8)


    An improvement I did: syncing music with the timer's end, especially a tense one with its climax just at the end. I chose (the very convenient) "Konvoi", by Klaus Doldinger. Having a music piece of this kind helps not to miss the perfect bidding time.

    Hello


    I have a first version of the design, using common parts and adapted to the 96-pin bus of the P2. At first glance it can be seen that an entire byte of the address is unused, so in case of a wirewrap the area near the connector wouldn't be as crowded as the memory card was.



    The analog part is still to be drawn, I have never worked with DACs or OPAMPs. I think I'll use DAC0800 but I don't know about the replacement for the LM307... I'm going to do some good research to find suitable present-day replacement.


    This is enough to add some ICs to my BOM list.


    Thank you very much,

    Jaume

    So , in that case sorry about my doubts.


    Stefan

    Why did you thought I was joking? ::cry::

    After I found the schematics I made some research and found other computers (mainly Russian clones of other systems) implementing sound using the same approach. Why Russian clones can have some good audio and my poor old P2 just a beeper? That's not fair!


    Don't worry, after all it's a hobby and everything here is just for fun and for learning purposes. :)

    Yesterday I got a very good deal for 25€.



    The machine is in very good shape, seems like it hadn't been used. This leaves me with only 5 models in the Nintendo portable consoles series (not G&W) to acquire (GB Light, GBA AGS-101, 3DS, new 2DS, new 3DS).

    This Monday I'll travel to Barcelona. I'll take this oportunity to acquire new components (do you believe it? I have a lot of 32K SRAM, but no 128K ones! ). As I don't know how much time wil pass until I could travel again and acquire more components, I'll try to get enough material to cover as many projects expected to take place during Summer.


    So I think it's time to present an idea I've been coving since January, when I (accidentally) found a MC-16 schematics scan. The MC-16 was the first sound card the Apple ][ had, and (I may be wrong) it was maybe the first commercial sound card a microcomputer had.


    Examining the diagrams I learnt some things. First, that a simple soundcard contains two sections: an analog one containing an operational amplifier, DACs to control the volume of each voice and resistors to mix the different voices; and a logic one which is a programmable signal generator. In the case of the MC the signal generator is a 8253 PIT, which was made as a support chip for the 8085. The original PIT is not made anymore, but the 82c54 is still in production and they are compatible.


    About the name of this project:

    I decided to name it "Shakuhachi". A shakuhachi is a very simple vertical flute made of bamboo.


    Image courtesy of Wikimedia commons.


    Just that, a bamboo pole with some holes. And the MC is just a counter with some DACs... Do you see the simile? :)


    This project is sure that won't be finished during Summer (so no false expectations). But the goals are the following:

    #1: Clone the design, adapted to use modern-day components

    #2: Experiment the following designs:


    square.jpg

    Square wave


    pulse.jpg

    Pulse


    sawtooth_inversesawtooth.jpg

    Sawtooth/Inverted sawtooth


    Triangle

    #3: If (#2) successful, think about integrating as much as possible in a card.


    Thank you for your time and my apologies for such ugly and dirty drawings.

    Interesting idea to create a board which may replace several other potential faulty components. Unfortunately I am not so deep into hardware design and the memory layout of the P2. Overall I am not sure if having e.g. the floppy ROM "backup" on the board is very useful. If the floppy controller is broken, just having a working ROM will not really help. If the floppy controller is generally working, I would replace a potentially faulty ROM directly on the controller.

    Hello gpospi ! Nice to see you too.


    Well, this part would only replace the rom containing the controller routines. If the floppy controller is failing unfortunately another solution should be sought (aka. another board). This is meant to solve memory issues, both random and read-only. Unless you floppy controller ROM is failing it won't help to solve your floppy issues. Unfortunately, this is outside the scope of this project, but sure I'll take a look and taking notes and ideas for possible future projects.


    I'm sorry about delaying this so much. My inexperience weights a lot...

    Hello Helmut, nice to see you!


    This summer will be full of computers. I've a Commodore computer coming and maybe a third P2 :S.

    My philosophy about the board is a restorative one, it is not meant as an upgrade (well, for 48K P2 sure, it will be an upgrade). Video memory is not addressed in this project.


    ROM is switched on/off with a switch because is meant to coexist with the original ones. In case of an original ROM failure, the only thing to do to restore the computer to a functional state would be activating the appropiate switch. This way the TMS ROMs are left out of the equation the same way as the 4116 would. Also, if they were not deactivated, conflict between the original ROMs and the new one may arise.


    Thank you very much,

    Jaume

    YaY : Dtoday finally my little 9 "Bernsteiner arrived - was a snapper - originally this comes from a typewriter, see manuals, which I like to give here:)

    This monitor is familiar to me. Was this Canon device powered with a Z80 derivative and designed to use 3" floppies?

    Greetings!


    I've returned, and with a new version of the schematics! :)



    Those modifications should enable/disable RAM sections as well ROM using a switch.


    Switch positions are:


    ROM Switch (SW1 on the schematics):

    SW1 SW2 SW3 Effect
    0 x x MOS ROM (on the new board) disabled
    1 x x MOS ROM (on the new board) enabled
    x 0 x Floppy control ROM (on the new board) disabled
    x 1 x Floppy control ROM (on the new board) enabled
    x x 0 Video and keyboard control ROM (on the new board) disabled
    x x 1 Video and keyboard control ROM (on the new board) enabled



    RAM Switch (SW2 on the schematics):

    SW1 SW2 SW3 Effect
    0 x x RAM 1800h-2000h disabled
    1 x x RAM 1800h-2000h enabled
    x 0 x Memory limited to 8000h-FFFFh, bank switching disabled (aka 32K mode)
    x 1 0 Memory map expanded to use the 8000h-FFFFh range, bank switching disabled (aka 48K mode)
    x 1 1 Memory map expanded to use the 8000h-FFFFh range, bank switching enabled (aka 64K mode)


    Have a nice evening.

    Ja Danke, das hatte ich nicht bedacht. Bei allen anderen CP/M Computern in meiner Sammlung habe ich 64 KB RAM ab 0000h, diese haben ja kein MOS Betriebssystem "davor". Irgendwo sollte ich vom Tiny Basic den Source Code haben, vielleicht versuche ich damit mal auf der P2 mein Glück. Aber zuvor werde ich dem Diskettenlauferksproblem nachgehen. Zudem werde ich mit den MOS Routinen "F" und "C" den Speicher näher untersuchen.

    For the source code of Tiny Basic, you may check Github.

    Greetings!


    I'm trying to set an schedule for this Summer. There's a lot of things to do and I'd want to do as much as I could (I've drawn a lot since November, and a large number of my drawings are P2 related). So there are my objectives for the next two months:


    #1: Put an end to Project "Elephant"

    Finishing design, order and test prototypes. I may also do a second wire-wrap test. If tested and working, then we'd talk about production batches for anybody interested in.


    #2: Set a proper development environment

    I'd like to acquire a third unit, one without case as my Italian P2 gets damaged every time I open it. I have a hand-drawn circuit of a software-triggered hardware breakpoint that I could build in order to test both hardware and software.


    #3: Start a second project, "Shakuhachi"

    In December I found some old but very interesting schematics from late 70s and I'd like to adapt them. The schematics are those of the ALF MC-16 sound card. I have a 8253 gathering dust at home so I may take it for a few tests. There are, however a pair of problems there. I have never worked with audio related stuff, DACs or opamps and I know that some of the components aren't made anymore (like the DAC76 or the 74LS324). If I wanted to adapt the attached diagram to use DAC800, what changes should be made? What opamp (currently produced) would you recommend?



    Thank you very much

    Jaume


    I've tied the previously generated control lines. The EPROM is also included in the diagram. All overlapping on the 16k is controlled. At this point the memory mode is not selectable and stuck at 64K mode. Once redesigned the switch logic, I'll start optimizing the diagram, placing references (Ux) at the ICs, specifying power supply pins and this kind of stuff. Still, counting gates and other components, this board should be buildable with 11 ICs.


    I have to put this project on hold again: I have an exam in 19/06 so active development will temporally cease (but I'll follow this and other threads) until later in that same day or until the following one.


    That being said, I'd like to know if you (especially who are experienced with electronics) can find points where this design may fail. After all, It's my first project and, while I've soldered a lot of kits, I've never created a board from scratch.


    Thank you very much!

    As a D flip flop has tow outputs and the second one is the first complimentary, the addition of an or gate allows to address the lower, unbanked 16k.


    translation+decode.png


    So if a '138 is fed with "-SysRegion" select signal...



    Four controlled 2k regions can be selected independently: three ROM select lines and a RAM select line. Later I'll deal of how this is tied against SRAM and ROM, but the following is the goal to achieve.



    There's overlap on the MOS memory and also on the ROM region. That's more or less what's wanted: overlap must be controlled, mainly by switches. Most people (including me) doesn't have material to read a TMS27xx, even less writing it. By using an standard 27c64 or 2864 (I think it was this reference) and three select lines, ROM can be selected in 2k chunks, allowing both partial (if > 0 but < 3 system roms failing) and full ROM replacement.

    Yes I see. My idea was just to simplify building a new 48KB RAM card (to replace the faulty original one), but you are now designing the "full solution" (expansion to 64KB or even more). Of course this is more complex, you need to be careful with overlapping addresses and the "switching logic" of the P2 (loading MOS with 48KB, then activating the full memory)...

    Interesting work anyway ;-)

    That's my goal too. but 2 IC for a 80x10cm board... You know what I mean. With some work it can be capable of more features. :)

    Hm, so overall using the 128KB SRAM is getting rather complicated. I didn't have time to check all details of the circuit and the P2 memory mapping concept so far. Somehow I am a bit confused with the memory map. I do not fully get why 2*32KB should be addressing-wise different to 128KB with permanently putting the highest address to 0 (or 1 in case of inverted addressing).

    No, for the 48K is simpler than the 2x32k version. A full P2 does not use a memory map of 64k but a 80k one by switching the lower 16k. In the old design I had three memory ICs (2x32k + 2k) sharing address lines and a decode logic to activate/deactivate them. As a new address line is provided the need of simulating a linear memory map is a must if the 64k boundary is to be crossed. I have plans to use the lower unbanked section in this card so that's why I need to create a "fake" address signal instead of presetting it to 0 or 1. It may be cleaner than my previous designs.


    Don't worry, you don't disturb. Your ideas are welcome. Think about it, gpospi 's idea has prompted a full redesign and this is a worst case escenario (but it's worth in the name of improvement). I think it's the right point in the process to discuss ideas. :)


    The fact of having 128k wasn't planned but I liked the idea of having a bank to control VRAM. Unfortunately, as access to video memory is more complicated because the video generation system is also using it at the same time, it doesn't fall inside this project scope. However, I'll take note for future projects.:thumbup:

    Looks ok for me (except for the 74LS08 where PINs 7 and 14 are mixed up in the external connection labels), and is definitely much simpler! You are right, it will not work completely without the 74LSxx. Still the new schematic with just a single AND gate is simpler than before. Overall the components are really cheap, I just ordered HM628128 for 1 EUR per piece. As soon as I get the components I will build the board and see if it works. But with this simple setup I am much more confident than with the original schematics ;-)

    Yes, I messed it when rotating the symbol... :fp:

    I've started to analyze some ideas about the modification.



    This is the raw, memory map provided by the 128K IC. The lower positions are located on the highest adresses and the higher positions on the lowest because it deals with the bus address directly from the bus (so, negated addresses). This is unusable AND there is an issue regarding addressing: as the bus doesn't provide a 17th address signal, an extra one has to be made. Fortunately, there's a D flip-flop that controls the bank so...



    After placing the '74 in charge of the memory, two 64K banks are generated. When 1 is placed on /A16 the bank is considered disabled, and enabled when 0 is provided. However, It still does not follows the configuration used in the P2 as the higher 48K aren't bank-switchable. -A16 must be remade considering the 16K area in which it is and if the bank is enabled (or disabled).


    translation.png


    This circuit only outputs a 0 when both addresses are in the lowest position (1 each) and bank is enabled, otherwise 1 is placed on its output. If this circuit is used to generate the address signal the following memory map is formed:



    This configuration follows the banking of the 64K P2. Next step is to refine the lowest, unbanked 16K bank to use only the appropiate memory there. Some extra logic might be placed to deactivate the second lowest 16K segment.

    The memories used by the P2 are 4116. They are organized in 16K x 1 (so, 24 in the DRAM card). To check them, you have to test the memory in 16K segments by storing and loading values. Usual bytes to test memory are 00h and FFh, 78h and 87h. If the read byte differs from the original you have to check what bits on the byte are different from the original value. The different ones are dead ICs that need to be replaced.

    Typically, not the small ceramic ones are broken, but the tantalum elkos. These are the individual drop-shaped, in the picture partly green, partly blue.

    I would control that first.


    EDIT: I had to replace some of them, If I had to take a picture of this now you would see some orange capacitors.

    jlopez : Wouldn't it be an option to use just a single, bigger SRAM chip instead of the two 32K chips? This would reduce the wiring mess (no need to "split" all address and data signals to two chips, no need for the 74LS02 to switch between the chips). I found some 128Kx8 SRAM chips, e.g. https://cdn-reichelt.de/docume…/A300/628128-70%23SAM.pdf. As far as I could see at a quick check, these chips seem to be "compatible" in functionality and interfaces (connector pins). So basically it would just be necessary to connect the pins on the chip's DIP-32 housing with the right pins on the computer's bus connector.


    Point for you. :thumbup:

    I'll study it. When I started drawing I wanted to use a 64Kx8 SRAM, but they aren't made anymore. As I didn't want to cross the 64K boundary I left it with 2 32Kx8 SRAM. As the next step will require 66K, sure, I'll made the appropriate changes.


    However, you still need the '02. Even with my configuration, without it RAM would overlap with MOS. I also wanted to make my board as configurable possible (maybe someone may not be interested to upgrade it, just to replace the old module) so decode logic will continue being there, althought I expect that a few parts may be more implicit.


    I must check if I have 128Kx8 memories in stock: I bought a lot of 32Kx8! :D


    Thank you for you contribution!

    Yes fits! I have now achieved a partial success in the commissioning of my P2. With PC power supply I could bring the system to life and see now the MOS start screen. This works only if I remove the memory card before. This apparently has a defect (short circuit) and paralyzes the power supply and the entire PC. In this respect I am particularly interested in the memory card (CAAC05).

    What line has the short?